`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 2024/02/25 23:27:47
// Design Name: 
// Module Name: top
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


module top(
//参数设置
    input clk,
    input rst_n,
    input keyadd,
    input keymin,
    input key1,
    input key2,
    output [3:0]led0,
    output [3:0]led1,
    output [3:0]led2
    
 );
 wire done;
 wire [7:0]time_shi;
 wire [7:0]time_fen;
 wire [7:0]time_miao;
 wire [7:0]time_nian;
 wire [7:0]time_yue;
 wire [7:0]time_ri;
 wire [7:0]clock_shi;
 wire [7:0]clock_fen;
 wire [7:0]clock_miao;
 wire key1_1;
 wire key2_2;
 wire key_add;
 wire key_min;
 wire time_state;
 wire key_state;
 //时钟初始化
start start(
    .clk(clk),
    .rst_n(rst_n),
    .done(done)
);
//显示模块
windows windows(
    .clk(done),
    .rst_n(rst_n),

    .time_shi(time_shi),
    .time_miao(time_miao),
    .time_fen(time_fen),
    .time_ri(time_ri),
    .time_shi(time_shi),
    .time_nian(time_nian),

    .led0(led0),
    .led1(led1),
    .led2(led2)
);
//按键切换模块
change change(
    .clk(clk),
    .rst_n(rst_n),

    .key1(key1_1),
    .key2(key2_2),
    .key_state(key_state)
);  
//按键加减模块
number number(
    .clk(clk),
    .rst_n(rst_n),

    .keyadd(key_add),
    .keymin(key_min),
    .time_state(time_state)
);
//闹钟模块
clock clock(
    .clk(clk),
    .rst_n(rst_n),

    .key2(key2_2),
    .key_add(key_add),
    .keymin(key_min)

);
endmodule
